The DDR4 Advantages over DDR3:
DDR4 was the next evolution in DRAM, bringing even higher performance and more robust control features while improving energy economy for enterprise, micro-server, tablet, and ultrathin client applications. The following table compares some of the key feature differences between DDR3 and DDR4. For further information regarding prices of the rams, kindly visit www.ababil.com.pk
|
Feature/Option |
|
Voltage (core& I/O) |
|
VREF inputs |
|
Low voltg standard |
|
Data rate (Mb/s) |
|
Densities |
|
Internal banks |
|
Bank groups (BG) |
|
tCK – DLL enabled |
|
t CK – DLL disabled |
|
Read latency |
|
Write latency |
|
DQ driver (ALT) |
|
DQ bus |
|
RTT values (in Ω) |
|
RTT not allowed |
|
ODT modes |
|
ODT control Multipurpose register (MPR) |
DDR3 |
1.5V |
2 DQs & CMD/ADDR |
Yes (DDR3L at 1.35V) |
800, 1066, 1333, 1600, 1866, 2133 |
512Mb–8Gb |
8 |
0 |
300 to 800 MHz |
10 MHz to 125 MHz |
AL + CL |
AL + CWL |
40Ω |
SSTL15 |
120, 60, 40, 30, 20 |
READ bursts |
Nominal, dynamic |
ODT signaling required |
Four registers – 1 defined, 3 RFU |
DDR4 |
1.2V |
1 – CMD/ADDR |
No |
1600, 1866, 2133, 2400, 2666, 3200 |
2Gb–16Gb |
16 |
4 |
667 MHz to 1.6 GHz |
Undefined to 125 MHz |
AL + CL |
AL + CWL |
48Ω |
POD12 |
240, 120, 80, 60, 48, 40, 34 |
Disables during READ bursts |
Nominal, dynamic, park |
ODT signaling not required |
Four registers – 3 defined, 1 RFU |
DDR4 Advantage |
Reduces power |
VREFDQ internal |
Power reduction |
Migration to higher‐speed I/O |
Better enablement for large-capacity memory subsystems |
More banks |
Faster burst accesses |
Higher data rates |
DLL-off now fully supported |
Expanded values |
Expanded values |
Optimized for PtP (point-to-point) applications |
Mitigate I/O noise and power |
Support higher data rates |
Ease-of-use |
Additional control mode; supports OTF value change |
Ease of ODT control, allows non-ODT routing on PtP applications |
Provides additional specialty readout |